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LTC3550 1 3550fa time (hr) 0 charge current (ma) battery voltage (v) dcin voltage (v) 4.2 200 0 400 800 600 1000 1.5 2.5 3550 ta02 3.6 3.4 5.0 4.0 3.8 2.5 0 0.5 1.0 2.0 3.0 constant voltage usbin = 5v t a = 25 c r idc = 1.24k r iusb = 2k dual input usb/ac adapter li-ion battery charger with 600ma buck converter the ltc ? 3550 is a standalone linear charger with a 600ma monolithic synchronous buck converter. it is capable of charging a single-cell li-ion battery from both wall adapter and usb inputs. the charger automatically selects the appropriate power source for charging. internal thermal feedback regulates the battery charge current to maintain a constant die temperature during high power operation or high ambient temperature conditions. the ? oat voltage is ? xed at 4.2v and the charge currents are programmed with external resistors. the LTC3550 terminates the charge cycle when the charge current drops below the programmed termination threshold after the ? nal ? oat voltage is reached. with power applied to both inputs, the LTC3550 can be put into shutdown mode reducing the dcin supply current to 20a, the usbin supply current to 10a, and the battery drain current to less than 2a. the dc/dc converter switching frequency is internally set at 1.5mhz, allowing the use of small surface mount inductors and capacitors. cellular telephones charges single-cell li-ion battery from wall adapter and usb inputs automatic input power detection and selection charge current programmable up to 950ma from wall adapter input adjustable output, high ef? ciency 600ma synchronous dc/dc converter no external mosfet, sense resistor or blocking diode needed thermal regulation maximizes charge rate without risk of overheating* preset charge voltage with 0.6% accuracy programmable charge current termination 1.5mhz constant frequency operation (step-down converter) 18a usb suspend current in shutdown power present status output charge status output automatic recharge available in a thermally enhanced, low pro? le (0.75mm) 16-lead (5mm 3mm) dfn package applicatio s u features descriptio u typical applicatio u complete charge cycle (1100ma battery) dual input battery charger and dc/dc converter , lt, ltc and ltm are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. *protected by u.s. patents, includng 6522118, 6700364, 6580258, 5481178, 6304066, 6127815, 6498466, 6611131 1.24k 1% 2k 1% wall adapter usb port 1 f 1 f 3550 ta01 4.7 f LTC3550 dcin sw v fb run bat gnd c out 10 f cer iterm + 2.2 h 4.2v single-cell li-ion battery v out 1.2v 600ma 2k 1% 800ma (wall) 500ma (usb) usbin iusb idc v cc 22pf 301k 301k
LTC3550 2 3550fa dcin, usbin .............................................. C0.3v to 10v en, ? c ? h ? r ? g, ? p ? w ? r, hpwr ............................ C0.3v to 10v bat, idc, iusb, iterm ................................ C0.3v to 7v v cc ............................................................... C0.3v to 6v run, v fb .....................................................C0.3v to v cc sw (dc) ........................................ C0.3v to (v cc + 0.3v) dcin pin current (note 2) ..........................................1a usbin pin current (note 2) .................................700ma bat pin current (note 2) ............................................1a p-channel sw source current (dc) .....................800ma n-channel sw source current (dc) ....................800ma peak sw sink and source current ...........................1.3a operating temperature range (note 3) ... C40c to 85c maximum junction temperature .......................... 125c storage temperature range ................... C65c to 125c (note 1) the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v dcin = 5v, v usbin = 5v, v cc = 3.6v unless otherwise noted. symbol parameter conditions min typ max units v dcin wall adapter input supply voltage 4.3 8 v v usbin usb port input supply voltage 4.3 8 v v cc buck regulator input supply voltage 2.5 5.5 v v en en input threshold voltage 0.4 0.7 1.0 v r en en pull-down resistance 1.2 2 5 m v run run threshold voltage 0.3 1 1.5 v i run run leakage current 0.01 1 a v ? c ? h ? r ? g ? c ? h ? r ? g output low voltage i ? c ? h ? r ? g = 5ma 0.35 0.6 v v ? p ? w ? r ? p ? w ? r output low voltage i ? p ? w ? r = 5ma 0.35 0.6 v v hpwr hpwr input threshold voltage 0.4 0.7 1 v r hpwr hpwr pull-down resistance 125 m v uvdc dcin undervoltage lockout voltage from low to high hysteresis 4.0 4.15 200 4.3 v mv v uvusb usbin undervoltage lockout voltage from low to high hysteresis 3.8 3.95 200 4.1 v mv v asd-dc v dcin C v bat lockout threshold voltage v dcin from low to high, v bat = 4.2v v dcin from high to low, v bat = 4.2v 140 20 180 50 220 80 mv mv v asd-usb v usbin C v bat lockout threshold voltage v usbin from low to high, v bat = 4.2v v usbin from high to low, v bat = 4.2v 140 20 180 50 220 80 mv mv electrical characteristics absolute axi u rati gs w ww u package/order i for atio uu w 16 15 14 13 12 11 10 9 17 1 2 3 4 5 6 7 8 dcin bat idc hpwr en run sw gnd usbin iusb iterm pwr chrg v fb v cc gnd top view dhc package 16-lead (5mm 3mm) plastic dfn t jmax = 125c, ja = 40c (note 4) exposed pad (pin 17) is gnd, must be soldered to pcb order part number dhc part marking LTC3550edhc 3550 order options tape and reel: add #tr lead free: add #pbf lead free tape and reel: add #trpbf lead free part marking: http://www.linear.com/leadfree/ consult ltc marketing for parts speci? ed with wider operating temperature ranges.
LTC3550 3 3550fa symbol parameter conditions min typ max units battery charger i dcin dcin supply current charge mode (note 5) standby mode shutdown mode r idc = 10k charge terminated enable = 5v 250 50 20 800 100 40 a a a i usbin usbin supply current charge mode (note 6) standby mode shutdown mode shutdown mode r iusb = 10k, v dcin = 0v charge terminated v dcin = 0v, enable = 0v v dcin > v usbin 250 50 18 10 800 100 36 20 a a a a v float regulated output (float) voltage i bat = 1ma i bat = 1ma, 0c < t a < 85c 4.175 4.158 4.2 4.2 4.225 4.242 v v i bat bat pin current constant-current mode constant-current mode constant-current mode standby mode shutdown mode sleep mode r idc = 1.25k r iusb = 2.1k r idc = 10k or r iusb = 10k charge terminated charger disabled dcin = 0v, usbin = 0v 760 450 93 800 476 100 C3 C1 1 840 500 107 C6 C2 2 ma ma ma a a a v idc idc pin regulated voltage constant-current mode 0.95 1.0 1.05 v v iusb iusb pin regulated voltage constant-current mode 0.95 1.0 1.05 v i terminate charge current termination threshold r iterm = 1k r iterm = 2k r iterm = 10k r iterm = 20k 90 45 8.5 4 100 50 10 5 110 55 11.5 6 ma ma ma ma i trikl trickle charge current v bat < v trikl ; r idc = 1.25k v bat < v trikl ; r iusb = 2.1k 60 30 80 47.5 100 65 ma ma v trikl trickle charge threshold voltage v bat rising hysteresis 2.8 2.9 100 3v mv v rechrg recharge battery threshold voltage v float C v rechrg , 0c < t a < 85c 65 100 135 mv t rechrg recharge comparator filter time v bat from high to low 3 6 9 ms t terminate termination comparator filter time i bat drops below termination threshold 0.8 1.5 2.2 ms t ss soft-start time i bat = 10% to 90% full-scale 175 250 325 s r on-dc power fet on-resistance (between dcin and bat) 400 m r on-usb power fet on-resistance (between usbin and bat) 550 m t lim junction temperature in constant- temperature mode 105 c switching regulator v fb regulated feedback voltage t a = 25c 0c t a 85c C40c t a 85c 0.5880 0.5865 0.5850 0.6 0.6 0.6 0.6120 0.6135 0.6150 v v v v fb reference voltage line regulation 0.04 0.4 %/v i pk peak inductor current v cc = 3v, v fb = 0.5v 0.75 1 1.25 a v loadreg output voltage load regulation 0.5 % the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v dcin = 5v, v usbin = 5v, v cc = 3.6v unless otherwise noted. electrical characteristics
LTC3550 4 3550fa symbol parameter conditions min typ max units i s v cc supply current active mode sleep mode shutdown (note 7) v fb = 0.5v, i load = 0a v fb = 0.62v, i load = 0a v run = 0v, v cc = 5.5v 300 20 0.1 400 35 1 a a a f osc oscillator frequency v fb = 0.6v v fb = 0v 1.2 1.5 210 1.8 mhz khz r pfet r ds(on) of p-channel fet 0.4 r nfet r ds(on) of n-channel fet 0.35 i lsw sw leakage current 0.01 1 a the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v dcin = 5v, v usbin = 5v, v cc = 3.6v unless otherwise noted. electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: guaranteed by long term current density limitations. note 3: the LTC3550e is guaranteed to meet the performance speci? cations from 0c to 85c. speci? cations over the C40c to 85c operating temperature range are assured by design, characterization and correlation with statistical process controls. note 4: failure to solder the exposed backside of the package to the pc board will result in a thermal resistance much higher than 40c/w. see thermal considerations. note 5: supply current includes idc and iterm pin current (approx- imately 100 a each) but does not include any current delivered to the battery through the bat pin (approximately 100ma). note 6: supply current includes iusb and iterm pin current (approx- imately 100 a each) but does not include any current delivered to the battery through the bat pin (approximately 100ma). note 7: dynamic supply current is higher due to the gate charge being delivered at the switching frequency.
LTC3550 5 3550fa iusb pin voltage vs temperature ( constant-current mode ) charge current vs idc pin voltage charge current vs iusb pin voltage ? p ? w ? r pin i-v curve ? c ? h ? r ? g pin i-v curve regulated charger output (float) voltage vs charge current regulated charger output (float) voltage vs temperature idc pin voltage vs temperature (constant-current mode) typical perfor a ce characteristics uw t a = 25c, unless otherwise noted. charge current (ma) 0 v float (v) 800 500 600 700 400 3550 g01 100 200 300 4.26 4.24 4.22 4.20 4.18 4.16 4.14 4.12 4.10 r idc = 1.25k r idc = r iusb = 2k v dcin = v usbin = 5v temperature ( c) C50 C25 v float (v) 050 25 75 100 3550 g02 4.220 4.215 4.210 4.205 4.200 4.195 4.190 4.185 4.180 v dcin = v usbin = 5v temperature ( c) C50 C25 0 50 25 75 100 v idc (v) 3550 g03 1.008 1.006 1.004 1.002 1.000 0.998 0.996 0.994 0.992 v dcin = 8v v dcin = 4.3v 3550 g04 temperature ( c) C50 C25 0 50 25 75 100 v iusb (v) 1.008 1.006 1.004 1.002 1.000 0.998 0.996 0.994 0.992 v usbin = 8v v usbin = 4.3v hpwr = 5v v idc (v) 0 0.2 0.6 1.0 i bat (ma) 0.8 900 800 700 600 500 400 300 200 100 0 3550 g05 0.4 1.2 v dcin = 5v r idc = 1.25k r idc = 2k r idc = 10k i bat (ma) 900 800 700 600 500 400 300 200 100 0 v iusb (v) 0 0.2 0.6 1.0 0.8 0.4 1.2 3550 g06 v usbin = 5v r iusb = 1.25k r iusb = 2k r iusb = 10k v pwr (v) 0 35 30 25 20 15 10 5 0 35 3550 g07 12 467 i pwr (ma) v dcin = v usbin = 5v t a = C 40 c t a = 25 c t a = 90 c 3550 g08 v dcin = v usbin = 5v 35 30 25 20 15 10 5 0 i chrg (ma) t a = C 40 c t a = 25 c t a = 90 c v chrg (v) 035 12 467 iusb pin voltage vs temperature ( constant-current mode ) temperature ( c) C50 v iusb (v) 25 75 3550 g43 C25 0 50 0.204 0.202 0.200 0.198 0.196 0.194 0.192 0.206 0.208 100 v usbin = 8v hpwr = 0v v usbin = 4.3v
LTC3550 6 3550fa charge current vs ambient temperature charge current vs dcin voltage charge current vs battery voltage usbin power fet on-resistance vs temperature en pin threshold voltage (on-to-off) vs temperature dcin shutdown current vs temperature usbin shutdown current vs temperature typical perfor a ce characteristics uw t a = 25c, unless otherwise noted. i bat (ma) 1000 800 600 400 200 0 3550 g10 temperature ( c) C50 25 75 C25 0 50 100 125 v dcin = v usbin = 5v v bat = 4v ja = 40 c/w r idc = 1.25k r idc = r iusb = 2k onset of thermal regulation v dcin (v) i bat (ma) 3550 g11 900 800 700 600 500 400 300 4.0 5.0 6.0 6.5 4.5 5.5 7.0 7.5 8.0 r idc = 1.25k v bat = 4v ja = 40 c/w onset of thermal regulation v bat (v) 2.4 i bat (ma) 1000 800 600 400 200 0 3.0 3.6 3.9 3550 g12 2.7 3.3 4.2 4.5 v dcin = v usbin = 5v ja = 40 c/w r idc = 1.25k temperature ( c) C50 r ds(on) (m ? ) 550 500 450 400 350 300 250 25 75 3550 g13 C25 0 50 100 125 v bat = 4v i bat = 200ma temperature ( c) C50 25 75 C25 0 50 100 125 r ds(on) (m ? ) 800 750 700 650 600 550 500 450 400 350 3550 g14 v bat = 4v i bat = 200ma temperature ( c) C50 25 75 C25 0 50 100 v en (mv) 900 850 800 750 700 650 600 3550 g15 v dcin = v usbin = 5v temperature ( c) C50 25 75 C25 0 50 100 i dcin ( a) 3550 g16 50 45 40 35 30 25 20 15 10 5 0 v dcin = 8v v dcin = 5v v dcin = 4.3v enable = 5v temperature ( c) C50 25 75 C25 0 50 100 i usbin ( a) 45 40 35 30 25 20 15 10 5 0 3550 g17 v usbin = 8v v usbin = 5v v usbin = 4.3v enable = 0v 3550 g44 temperature ( c) C50 25 75 C25 0 50 100 v hpwr (mv) 900 850 800 750 700 650 600 v dcin = v usbin = 5v hpwr pin threshold voltage (rising) vs temperature dcin power fet on-resistance vs temperature
LTC3550 7 3550fa en pin pull-down resistance vs temperature typical perfor a ce characteristics uw undervoltage lockout threshold vs temperature recharge threshold voltage vs temperature buck regulator ef? ciency vs v cc charge current during turn-on and turn-off battery drain current vs temperature buck regulator ef? ciency vs output current temperature ( c) C50 25 75 C25 0 50 100 3550 g18 r en (m ? ) 2.8 2.6 2.4 2.2 2.0 1.8 1.6 temperature ( c) C50 C25 v uv (v) 050 25 75 100 3550 g19 4.25 4.20 4.15 4.10 4.05 4.00 3.95 3.90 3.85 dcin uvlo usbin uvlo temperature ( c) C50 C25 0 50 25 75 100 v rechrg (v) 4.16 4.14 4.12 4.10 4.08 4.06 4.04 3550 g20 v dcin = v usbin = 4.3v v dcin = v usbin = 8v temperature ( c) C50 i bat ( a) 5 4 3 2 1 0 C1 C25 02550 3550 g21 75 100 v bat = 4.2v v dcin , v usbin (not connected) 3550 g22 v dcin = 5v r idc = 1.25k 100 s/div i bat 500ma/div enable 5v/div v cc (v) 2 50 efficiency (%) 55 65 70 75 100 85 3 4 3550 g23 60 90 95 80 5 6 i out = 600ma v out = 1.8v i out = 100ma i out = 10ma i out = 0.1ma i out = 1ma output current (ma) 70 efficiency (%) 80 90 95 0.1 10 100 1000 3550 g24 60 1 85 75 65 v out = 1.8v v cc = 2.7v v cc = 4.2v v cc = 3.6v t a = 25c, unless otherwise noted. 3550 g45 temperature ( c) C50 25 75 C25 0 50 100 r hpwr (m ? ) 2.8 2.6 2.4 2.2 2.0 1.8 1.6 hpwr pin pull-down resistance vs temperature output current (ma) 70 efficiency (%) 80 90 95 0.1 10 100 1000 3550 g25 60 1 85 75 65 v out = 1.5v v cc = 2.7v v cc = 4.2v v cc = 3.6v buck regulator ef? ciency vs output current
LTC3550 8 3550fa temperature ( c) C50 0.4 0.5 0.7 25 75 3550 g32 0.3 0.2 C25 0 50 100 125 0.1 0 0.6 r ds(on) ( ? ) main switch synchronous switch v cc = 2.7v v cc = 3.6v v cc = 4.2v v cc (v) 1 0 0.4 0.5 0.7 46 3550 g31 0.3 0.2 23 57 0.1 0 0.6 r ds(on) ( ? ) main switch synchronous switch temperature ( c) C50 frequency (mhz) 1.70 1.65 1.60 1.55 1.50 1.45 1.40 1.35 1.30 25 75 C25 0 50 100 125 v cc = 3.6v 3550 g28 oscillator frequency vs temperature buck regulator supply current vs v cc buck regulator supply current vs temperature typical perfor a ce characteristics uw t a = 25c, unless otherwise noted. oscillator frequency vs v cc v cc (v) 2 frequency (mhz) 1.8 1.7 1.6 1.5 1.4 1.3 1.2 34 56 3550 g29 buck regulator output voltage vs load current load current (ma) 0 output voltage (v) 200 300 400 500 600 700 800 1.844 1.834 1.824 1.814 1.804 1.794 1.784 1.774 3550 g30 100 900 v cc = 3.6v r ds(on) vs v cc buck regulator switches r ds(0n) vs temperature v cc (v) 2 0 supply current ( a) 5 15 20 25 50 35 3 4 3550 g33 10 40 45 30 5 6 v out = 1.875v i load = 0a temperature ( c) C50 0 supply current ( a) 5 15 20 25 50 35 0 50 75 3550 g34 10 40 45 30 C25 25 100 125 v cc = 3.6v v out = 1.875v i load = 0a buck regulator reference voltage vs temperature buck regulator ef? ciency vs output current output current (ma) 70 efficiency (%) 80 85 95 100 0.1 10 100 1000 3550 g26 60 1 90 75 65 v out = 2.5v v cc = 2.7v v cc = 4.2v v cc = 3.6v temperature ( c) C50 reference voltage (v) 0.614 0.609 0.604 0.599 0.594 0.589 0.584 25 75 C25 0 50 100 125 v cc = 3.6v 3550 g27
LTC3550 9 3550fa temperature ( c) C50 switch leakage (na) 200 250 300 25 75 3550 g35 150 100 C25 0 50 100 125 50 0 v cc = 5.5v run = 0v main switch synchronous switch switch leakage current vs temperature start-up from shutdown load step load step typical perfor a ce characteristics uw t a = 25c, unless otherwise noted. v cc (v) 0 0 switch leakage (pa) 20 40 60 80 120 1 234 3550 g36 56 100 run = 0v synchronous switch main switch switch leakage current vs v cc run 2v/div i load 500ma/div v out 1v/div 40 s/div v cc = 3.6v v out = 1.8v i load = 600ma 3550 g38 i l 500ma/div i load 500ma/div v out 100mv/div ac coupled 20 s/div v cc = 3.6v v out = 1.8v i load = 0ma to 600ma 3550 g39 i load 500ma/div i l 500ma/div v out 100mv/div ac coupled 20 s/div v cc = 3.6v v out = 1.8v i load = 50ma to 600ma 3550 g40 load step load step i load 500ma/div i l 500ma/div v out 100mv/div ac coupled 20 s/div v cc = 3.6v v out = 1.8v i load = 100ma to 600ma 3550 g41 i l 500ma/div i load 500ma/div v out 100mv/div ac coupled 20 s/div v cc = 3.6v v out = 1.8v i load = 200ma to 600ma 3550 g42 burst mode operation sw 5v/div i l 200ma/div v out 100mv/div ac coupled 4 s/div v cc = 3.6v v out = 1.8v i load = 50ma 3550 g37
LTC3550 10 3550fa pi fu ctio s uuu usbin (pin 1): usb input supply pin. provides power to the battery charger. the maximum supply current is 650ma. this should be bypassed with a 1f capacitor. iusb (pin 2): usb charge current program and monitor pin. the charge current can be set by connecting a resis- tor, r iusb , to ground. when charging in constant-current mode, this pin servos to 1v. the voltage on this pin can be used to measure the charge current delivered from the usb input using the following formula: i v r bat iusb iusb = ? 1000 iterm (pin 3): termination current threshold program pin. the current termination threshold, i terminate , can be set by connecting a resistor, r iterm , to ground. i terminate is set by the following formula: i v r terminate iterm = 100 when the charge current, i bat , falls below the termination threshold, charging stops and the ? c ? h ? r ? g output becomes high impedance. this pin is internally clamped to approximately 1.5v. driv- ing this pin to voltages beyond the clamp voltage should be avoided. ? p ? w ? r (pin 4): open-drain power supply status output. when the dcin or usbin pin voltage is suf? cient to begin charging (i.e., when the supply is greater than the undervoltage lockout threshold and at least 180mv above the battery terminal), the ? p ? w ? r pin is pulled low by an internal n-channel mosfet. otherwise, ? p ? w ? r is high impedance. the output is capable of sinking up to 10ma, making it suitable for driving an led. ? c ? h ? r ? g (pin 5): open-drain charge status output. when the LTC3550 is charging, the ? c ? h ? r ? g pin is pulled low by an internal n-channel mosfet. when the charge cycle is completed, ? c ? h ? r ? g becomes high impedance. this output is capable of sinking up to 10ma, making it suitable for driving an led. v fb (pin 6): voltage feedback pin. receives the feedback voltage from an external resistor divider across the buck regulator output. v cc (pin 7): buck regulator input supply pin. must be closely decoupled to gnd (pins 8, 9) with a 2.2f or greater ceramic capacitor. gnd (pins 8, 9): ground. sw (pin 10): buck regulator switch node connection to inductor. this pin connects to the drains of the internal main (top) and synchronous (bottom) power mosfet switches. run (pin 11): buck regulator run control input. forcing this pin above 1.5v enables the regulator. forcing this pin below 0.3v shuts it down. in shutdown, all buck regulator functions are disabled drawing <1a supply current from v cc . do not leave run ? oating. en (pin 12): charger enable input. a logic low on this pin enables the charger. if this input is left ? oating, an internal 2m pull-down resistor defaults the LTC3550 to charge mode. pull this pin high to disable the charger. hpwr (pin 13): usb high/low power mode select input. used to control the amount of current drawn from the usb port. a logic high on the hpwr pin sets the charge current to 100% of the current programmed by the iusb pin. a logic low on the hpwr pin sets the charge current to 20% of the current programmed by the iusb pin. an internal 2m pull-down resistor defaults the charger to its low current state. idc (pin 14): wall adapter charge current program and monitor pin. the charge current is set by connecting a resistor, r idc , to ground. when charging in constant- current mode, this pin servos to 1v. the voltage on this pin can be used to measure the charge current using the following formula: i v r bat idc idc = ? 1000 bat (pin 15): charger output. this pin provides charge current to the battery and regulates the ? nal ? oat voltage to 4.2v.
LTC3550 11 3550fa pi fu ctio s uuu dcin (pin 16): wall adapter input supply pin. provides power to the battery charger. the maximum supply current is 950ma. this should be bypassed with a 1f capacitor. exposed pad (pin 17): gnd. the exposed backside of the package is ground and must be soldered to the pcb ground for electrical connection and maximum heat transfer. block diagra w freq shift 13 C + C + C + C + term trickle rechrg logic 2.9v 3.95v bat 100mv i bat /1000 i bat /1000 i bat /1000 4 5 12 3 14 2 11 dc_enable usb_enable charger control cc/cv regulator cc/cv regulator 15 16 1 r iterm r iusb r idc iterm iusb idc 105 c t die usb soft- start dc soft- start usbin uvlo dcin uvlo dcin bat usbin hpwr en pwr chrg termination trickle charge thermal regulation 10ma max 10ma max 3550 bd C + C + C + 4.15v bat + C i rcmp + C i comp v cc s r rs latch switching logic and blanking circuit anti- shoot- thru + C ea burst clamp q q 5 ? 7 v fb 6 sw 10 0.6v slope comp osc run 8, 9, 17 gnd C + 4.1v bat recharge i th r en r hpwr
LTC3550 12 3550fa operatio u the LTC3550 consists of two main blocks: a lithium-ion battery charger and a high-ef? ciency buck converter that can be powered from the battery. the charger is designed to ef? ciently manage charging of a single-cell lithium-ion battery from two separate power sources: a wall adapter and usb power bus. the internal p-channel mosfets can supply up to 950ma from the wall adapter source and 500ma from the usb power source. the ? nal ? oat voltage accuracy is 0.6%. the buck converter uses a constant frequency, current mode step-down architecture. both the main (p-channel mosfet) and synchronous (n-channel mosfet) switches for the buck converter are internal. the LTC3550 requires no external diodes or sense resistors. figure 1. LTC3550 state diagram of a charge cycle lithium-ion battery charger a charge cycle begins when the voltage at either the dcin pin or usbin pin rises above the uvlo threshold level and the charger is enabled through the en pin. when either input is supplying power, logic low enables the charger and logic high disables it (a 2m pull-down defaults the charger to the charging state). the dcin input draws 20a when the charger is in shutdown. the usbin input draws 18a during shutdown if no power is applied to dcin, but draws only 10a when v dcin > v usbin . once the charger is enabled, it enters constant-current mode, where the programmed charge current is supplied to the battery. when the bat pin approaches the ? nal ? oat voltage (4.2v), the charger enters constant-voltage trickle charge mode 1/10th full current chrg state: pulldown shutdown mode i usbin drops to 18 a chrg state: hi-z charge mode full current chrg state: pulldown charge mode full current hpwr = high 1/5 full current hpwr = low chrg state: pulldown standby mode no charge current chrg state: hi-z shutdown mode i dcin drops to 20 a chrg state: hi-z bat > 2.9v bat < 2.9v bat < 2.9v 2.9v < bat 2.9v < bat bat > 2.9v bat < 4.1v bat < 4.1v i bat < i terminate in voltage mode i bat < i terminate in voltage mode power selection standby mode no charge current chrg state: hi-z trickle charge mode 1/10th full current chrg state: pulldown en driven high en driven low en driven high dcin power removed dcin power removed usbin power removed or dcin power applied usbin power removed or dcin power applied dcin power applied only usb power applied startup 3550 f01 en driven low
LTC3550 13 3550fa operatio u mode and the charge current begins to decrease. once the charge current drops below the programmed termina- tion threshold (set by the external resistor r iterm ), the internal p-channel mosfet is shut off and the charger enters standby mode. in standby mode, the charger sits idle and monitors the battery voltage using a comparator with a 6ms ? lter time (t rechrg ). a charge cycle automatically restarts when the battery voltage falls below 4.1v (which corresponds to ap- proximately 80% to 90% battery capacity). this ensures that the battery is kept near a fully charged condition and eliminates the need for periodic charge cycle initiations. figure 1 uses a state diagram to describe the behavior of the LTC3550 battery charger. 600ma step-down regulator the LTC3550 regulator uses a constant frequency, current mode step-down architecture. both the top (p-channel mosfet) and bottom (n-channel mosfet) switches are internal. during normal operation, the internal top power mosfet is turned on each cycle when the oscillator sets the rs latch, and is turned off when the current com- parator, i comp , resets the rs latch. the peak inductor current at which i comp resets the rs latch, is controlled by the output of error ampli? er ea. when the load current increases, it causes a slight decrease in the output voltage (v out ), relative to the internal reference, which in turn causes the ea ampli? ers output voltage to increase until the average inductor current matches the new load cur- rent. while the top mosfet is off, the bottom mosfet is turned on until either the inductor current starts to reverse, as indicated by the current reversal comparator i rcmp , or the beginning of the next clock cycle. burst mode ? operation the LTC3550 buck regulator is capable of burst mode operation in which the internal power mosfets operate intermittently based on load current demand. in burst mode operation, the peak current of the inductor is set to approximately 200ma regardless of the output load. each burst event can last from a few cycles at light loads to almost continuously cycling with short sleep intervals at moderate loads. in between these burst events, the power mosfets and any unneeded circuitry are turned off, reducing the quiescent current to 20a. in this sleep state, the load current is being supplied solely from the output capacitor. as the output voltage droops, the ea ampli? ers output rises above the sleep threshold signaling the burst comparator to trip and turn the top mosfet on. this process repeats at a rate that is dependent on the load demand. dropout operation as the input supply voltage decreases to a value approach- ing the output voltage, the duty cycle increases toward the maximum on-time. further reduction of the supply voltage forces the main switch to remain on for more than one cycle until it reaches 100% duty cycle. the output voltage will then be determined by the input voltage minus the voltage drop across the p-channel mosfet and the inductor. an important detail to remember is that at low input supply voltages, the r ds(on) of the p-channel switch increases (see typical performance characteristics). therefore, the user should calculate the power dissipation when the LTC3550 is used at 100% duty cycle with low input voltage (see thermal considerations in the applications information section). short-circuit protection when the regulator output is shorted to ground, the fre- quency of the oscillator is reduced to about 210khz, one seventh the nominal frequency. this frequency foldback ensures that the inductor current has more time to decay, thereby preventing runaway. the oscillators frequency will progressively increase to 1.5mhz when v fb rises above 0v. burst mode is a registered trademark of linear technology corporation.
LTC3550 14 3550fa operatio u battery charger power source selection the LTC3550 can charge a battery from either the wall adapter input or the usb port input. the charger automati- cally senses the presence of voltage at each input. if both power sources are present, the charger defaults to the wall adapter source provided suf? cient power is present at the dcin input. suf? cient power is de? ned as: ? supply voltage is greater than the uvlo threshold. ? supply voltage is greater than the battery voltage by 50mv (180mv rising, 50mv falling). table 1 describes the behavior of the pwr status output. table 1. power source selection v usbin > 3.95v and v usbin > bat + 50mv v usbin < 3.95v or v usbin < bat + 50mv v dcin > 4.15v and v dcin > bat + 50mv charger powered from wall adapter source; usbin current < 25a ? p ? w ? r: low charger powered from wall adapter source ? p ? w ? r: low v dcin < 4.15v or v dcin < bat + 50mv charger powered from usb source; ? p ? w ? r: low no charging ? p ? w ? r: hi-z status indicators the charge status output ( ? c ? h ? r ? g) has two states: pull- down and high impedance. the pull-down state indicates that the LTC3550 is in a charge cycle. once the charge cycle has terminated or the LTC3550 is disabled, the pin state becomes high impedance. the pull-down state is strong enough to drive an led and is capable of sinking up to 10ma. the power supply status output ( ? p ? w ? r) has two states: pull- down and high impedance. the pull-down state indicates that power is present at either dcin or usbin. if no power is applied at either pin, the ? p ? w ? r pin is high impedance, indicating that the LTC3550 lacks suf? cient power to charge the battery. the pull-down state is strong enough to drive an led and is capable of sinking up to 10ma. low-battery charge conditioning (trickle charge) this feature ensures that deeply discharged batteries are gradually charged before applying full charge current . if the bat pin voltage is below 2.9v, the LTC3550 supplies 1/10th of the full charge current to the battery until the bat pin rises above 2.9v. for example, if the charger is programmed to charge at 800ma from the wall adapter input and 500ma from the usb input, the charge current during trickle charge mode would be 80ma and 50ma, respectively. thermal limiting an internal thermal feedback loop reduces the programmed charge current if the die temperature attempts to rise above a preset value of approximately 105c. this feature protects the LTC3550 from excessive temperature and allows the user to push the limits of the power handling capability of a given circuit board without risk of damag- ing the device. the charge current can be set according to typical (not worst-case) ambient temperature with the assurance that the charger will automatically reduce the current in worst case conditions. dfn package power considerations are discussed further in the applications information section. charge current soft-start and soft-stop the battery charger includes a soft-start circuit to minimize the inrush current at the start of a charge cycle. when a charge cycle is initiated, the charge current ramps from zero to full-scale current over a period of 250s. likewise, internal circuitry ramps the charge current from full-scale to zero in approximately 30s when the charger shuts down or self terminates. this minimizes the transient current load on the power supply during start-up and shutdown.
LTC3550 15 3550fa r idc r iusb wall adapter usb port c2 c1 3550 f02 c in LTC3550 dcin sw v fb bat gnd c out iterm + l1 4.2v single cell li-ion battery v out 1.2v 600ma r iterm usbin iusb idc v cc run c f r2 r1 applicatio s i for atio wu u u figure 2 shows the basic LTC3550 application circuit. external component selection is driven by the charging requirements and the buck regulator load requirements. charge current out of the bat pin can be determined at any time by monitoring the idc or iusb pin voltage and using the following equations: i v r ch ing from wall adapter bat idc idc = ?,(arg 1000 )) ?,(arg sup i v r ch ing from usb p bat iusb iusb = 1000 ll y hpwr high i v r ch in bat iusb iusb , ) ?,(arg = = 200 g gfromusb ply hpwr low sup , ) = programming charge termination the charge cycle terminates when the charge current falls below the programmed termination threshold during con- stant-voltage mode. this threshold is set by connecting an external resistor, r iterm , from the iterm pin to ground. the charge termination current threshold (i terminate ) is set by the following equation: r v i i v r iterm terminate terminate iterm == 100 100 , the termination condition is detected by using an internal ? ltered comparator to monitor the iterm pin. when the iterm pin voltage drops below 100mv* for longer than t terminate (typically 1.5ms), charging is terminated. the charge current is latched off and the LTC3550 enters standby mode. when charging, transient loads on the bat pin can cause the iterm pin to fall below 100mv for short periods of time before the dc charge current has dropped below the programmed termination current. the 1.5ms ? lter time (t terminate ) on the termination comparator ensures that transient loads of this nature do not result in premature charge cycle termination. once the average charge current drops below the programmed termination threshold, the LTC3550 terminates the charge cycle and stops providing any current out of the bat pin. in this state, any load on the bat pin must be supplied by the battery. programming and monitoring charge current the charge current delivered to the battery from the wall adapter supply is programmed using a single resistor from the idc pin to ground. r v i i v r idc chrg dc chrg dc idc == 1000 1000 () () , similarly, the charge current from the usb supply is programmed using a single resistor from the iusb pin to ground. setting hpwr pin to its high state will select 100% of the programmed charge current, while setting hpwr to its low state will select 20% of the programmed charge current. r v i hpwr high i iusb chrg usb chrg usb == 1000 () () () = == = 1000 200 v r hpwr high i v r iusb chrg usb ius () () bb hpwr low () = figure 2. LTC3550 basic circuit *any external sources that hold the iterm pin above 100mv will prevent the LTC3550 from terminating a charged cycle.
LTC3550 16 3550fa applicatio s i for atio wu u u buck regulator inductor selection for most applications, the value of the inductor will fall in the range of 1h to 4.7h. its value is chosen based on the desired inductor ripple current. large value inductors lower ripple current and small value inductors result in higher ripple currents. higher v cc or v out also increases the ripple current as shown in equation 1. a reasonable starting point for setting ripple current is i l = 240ma (40% of 600ma). ? i v fl v v l out o out cc =? ? ? ? ? ? ? ? ?1 (1) the dc current rating of the inductor should be at least equal to the maximum load current plus half the ripple current to prevent core saturation. thus, a 720ma rated inductor should be enough for most applications (600ma + 120ma). for best ef? ciency, choose a low dc-resistance inductor. the inductor value also has an effect on burst mode opera- tion. the transition to low current operation begins when the inductor current peaks fall to approximately 200ma. lower inductor values (higher i l ) will cause this to occur at lower load currents, which can cause a dip in ef? ciency in the upper range of low current operation. in burst mode operation, lower inductance values will cause the burst frequency to increase. inductor core selection different core materials and shapes will change the size/current and price/current relationship of an induc- tor. toroid or shielded pot cores in ferrite or permalloy materials are small and dont radiate much energy, but generally cost more than powdered iron core inductors with similar electrical characteristics. the choice of which style inductor to use often depends more on the price vs size requirements and any radiated ? eld/emi requirements than on what the LTC3550 requires to operate. table 2 shows some typical surface mount inductors that work well in LTC3550 applications. table 2. representative surface mount inductors part number value (h) dcr ( max) max dc current (a) size w l h (mm) sumida cdrh3d16 1.5 2.2 3.3 4.7 0.043 0.075 0.110 0.162 1.55 1.20 1.10 0.90 3.8 3.8 1.8 sumida cmd4d06 2.2 3.3 4.7 0.116 0.174 0.216 0.950 0.770 0.750 3.5 4.3 0.8 panasonic elt5kt 3.3 4.7 0.17 0.20 1.00 0.95 4.5 5.4 1.2 murata lqh32cn 1.0 2.2 4.7 0.060 0.097 0.150 1.00 0.79 0.65 2.5 3.2 2.0 c in and c out selection in continuous mode, the source current of the top mosfet is a square wave of duty cycle v out /v cc . to prevent large voltage transients, a low esr input capacitor sized for the maximum rms current must be used. the maximum rms capacitor current is given by: c required i i vvv v in rms omax out cc out cc ? ? () (2) this formula has a maximum at v cc = 2v out , where i rms = i out /2. this simple worst-case condition is commonly used for design because even signi? cant deviations do not offer much relief. note that the capacitor manufacturers ripple current ratings are often based on 2000 hours of life. this makes it advisable to further derate the capaci- tor, or choose a capacitor rated at a higher temperature than required. always consult the manufacturer if there is any question. the selection of c out is driven by the required effective series resistance (esr). typically, once the esr requirement for c out has been met, the rms current rating generally far exceeds the i ripple(p-p) requirement. the output ripple v out is determined by: ??? + ? ? ? ? ? ? viesr fc out l out 1 8 (3)
LTC3550 17 3550fa applicatio s i for atio wu u u where f = operating frequency, c out = output capacitance and i l = ripple current in the inductor. for a ? xed output voltage, the output ripple voltage is highest at maximum input voltage since i l increases with input voltage. aluminum electrolytic and solid tantalum capacitors are both available in surface mount con? gurations. in the case of tantalum, it is critical that the capacitors are surge tested for use in switching power supplies. an excellent choice is the avx tps series of surface mount tantalum. these are specially constructed and tested for low esr so they give the lowest esr for a given volume. other capacitor types include sanyo poscap, kemet t510 and t495 series, and sprague 593d and 595d series. consult the manufacturer for other speci? c recommendations. using ceramic input and output capacitors higher capacitance values, lower cost ceramic capacitors are now becoming available in smaller case sizes. their high ripple current, high voltage rating and low esr make them ideal for switching regulator applications. because the LTC3550s control loop does not depend on the output capacitors esr for stable operation, ceramic capacitors can be used freely to achieve very low output ripple and small circuit size. when choosing the input and output ceramic capacitors, choose the x5r or x7r dielectric formulations. these dielectrics have the best temperature and voltage charac- teristics of all the ceramics for a given value and size. output voltage programming the output voltage is set by a resistive divider according to the following formula: vv r r out =+ ? ? ? ? ? ? 06 1 2 1 . (4) the external resistive divider is connected to the output, allowing remote voltage sensing as shown in figure 3. ef? ciency considerations the ef? ciency of a switching regulator is equal to the output power divided by the input power times 100%. it is often useful to analyze individual losses to determine what is limiting the ef? ciency and which change would produce the most improvement. ef? ciency can be expressed as: ef? ciency = 100% C (l1 + l2 + l3 + ...) where l1, l2, etc. are the individual losses as a percent- age of input power. although all dissipative elements in the circuit produce losses, two main sources usually account for most of the losses in LTC3550 circuits: v cc quiescent current and i 2 r losses. the v cc quiescent current loss dominates the ef? ciency loss at very low load currents whereas the i 2 r loss dominates the ef? ciency loss at medium to high load currents. in a typical ef? ciency plot, the ef? ciency curve at very low load currents can be misleading since the actual power lost is of no consequence as illustrated in figure 4. 1. the v cc quiescent current is due to two components: the dc bias current as given in the electrical charac- teristics and the internal main switch and synchronous figure 4. power lost vs load current load current (ma) 0.1 1 0.00001 power loss (w) 0.001 1 10 100 1000 3550 f04 0.0001 0.01 0.1 v fb gnd LTC3550 0.6v v out 5.5v r2 r1 3550 f03 figure 3. setting the LTC3550 output voltage
LTC3550 18 3550fa applicatio s i for atio wu u u switch gate charge currents. the gate charge current results from switching the gate capacitance of the internal power mosfet switches. each time the gate is switched from high to low to high again, a packet of charge, dq, moves from v cc to ground. the resulting dq/dt is the current out of v cc that is typically larger than the dc bias current. in continuous mode, i gatechg = f(q t + q b ) where q t and q b are the gate charges of the internal top and bottom switches. both the dc bias and gate charge losses are proportional to v cc and thus their effects will be more pronounced at higher supply voltages. 2. i 2 r losses are calculated from the resistances of the internal switches, r sw , and external inductor r l . in continuous mode, the average output current ? owing through inductor l is chopped between the main switch and the synchronous switch. thus, the series resistance looking into the sw pin is a function of both top and bottom mosfet r ds(on) and the duty cycle (dc) as follows: r sw = (r ds(on)top )(dc) + (r ds(on)bot )(1 C dc) the r ds(on) for both the top and bottom mosfets can be obtained from the typical performance characteristics curves. thus, to obtain i 2 r losses, simply add r sw to r l and multiply the result by the square of the average output current. other losses including c in and c out esr dissipa- tive losses and inductor core losses generally account for less than 2% total additional loss. thermal considerations the battery chargers thermal regulation feature and the buck regulators high ef? ciency make it unlikely that enough power will be dissipated to exceed the LTC3550 maximum junction temperature. nevertheless, it is a good idea to do some thermal analysis for worst-case conditions. the junction temperature, t j , is given by: t j = t a + t rise where t a is the ambient temperature. the temperature rise is given by: t rise = p d ? ja where p d is the power dissipated and ja is the thermal resistance from the junction of the die to the ambient temperature. in most applications the buck regulator does not dissi- pate much heat due to its high ef? ciency. the majority of the LTC3550 power dissipation occurs when charging a battery. fortunately, the LTC3550 automatically reduces the charge current during high power conditions using a patented thermal regulation circuit. thus, there is no need to design for worst-case power dissipation scenarios because the LTC3550 ensures that the battery charger power dissipation never raises the junction temperature above a preset value of 105c. in the unlikely case that the junction temperature is forced above 105c (due to abnormally high ambient temperatures or excessive buck regulator power dissipation), the battery charge current will be reduced to zero and thus dissipate no heat. as an added measure of protection, even if the junction temperature reaches approximately 150c, the buck regulators power switches will be turned off and the sw node will become high impedance. the conditions that cause the LTC3550 to reduce charge current through thermal feedback can be approximated by considering the power dissipated in the ic. the approxi- mate ambient temperature at which the thermal feedback begins to protect the ic is: t a = 105c C t rise t a = 105c C (p d ? ja ) t a = 105c C (p d(charger) + p d(buck) ) ? ja (5) most of the chargers power dissipation is generated from the internal charger mosfet. thus, the power dissipation is calculated to be: p d(charger) = (v in C v bat ) ? i bat (6) v in is the charger supply voltage (either dcin or usbin), v bat is the battery voltage and i bat is the charge cur- rent. example: an LTC3550 operating from a 5v wall adapter (on the dcin input) is programmed to supply 650ma full-scale current to a discharged li-ion battery with a voltage of 3v. the charger power dissipation is calculated to be: p d(charger) = (5v C 3v) ? 650ma = 1.3w
LTC3550 19 3550fa applicatio s i for atio wu u u for simplicity, assume the buck regulator is disabled and dissipates no power (p d(buck) = 0). for a properly soldered dhc16 package, the thermal resistance ( ja ) is 40c/w. thus, the ambient temperature at which the LTC3550 charger will begin to reduce the charge current is: t a = 105c C (1.3w ? 40c/w) t a = 105c C 52c t a = 53c the LTC3550 can be used above 53c ambient, but the charge current will be reduced from 650ma. assum- ing no power dissipation from the buck converter, the approximate current at a given ambient temperature can be approximated by: i ct vv bat a in bat ja = 105 C (C )? (7) using the previous example with an ambient temperature of 60c, the charge current will be reduced to approxi- mately: i cc vv cw c ca i bat ba = = 105 60 53 40 45 80 C (C)? / / tt ma = 563 because the regulator typically dissipates signi? cantly less power than the charger (even in worst-case situations), the calculations here should work well as an approxima- tion. however, the user may wish to repeat the previous analysis to take the buck regulators power dissipation into account. equation (7) can be modi? ed to take into account the temperature rise due to the buck regulator: i ct p vv bat a d buck ja in bat ja = ? 105 C ( ? ) (C )? () (8) for optimum performance, it is critical that the exposed metal pad on the backside of the LTC3550 package is properly soldered to the pc board ground. when correctly soldered to a 2500mm 2 double sided 1oz copper board, the LTC3550 has a thermal resistance of approximately 40c/w. failure to make thermal contact between the exposed pad on the backside of the package and the copper board will result in thermal resistances far greater than 40c/w. as an example, a correctly soldered LTC3550 can deliver over 800ma to a battery from a 5v supply at room temperature. without a good backside thermal connection, this number would drop to much less than 500ma. battery charger stability considerations the constant-voltage mode feedback loop is stable without any compensation provided a battery is connected to the charger output. when the charger is in constant-current mode, the charge current program pin (idc or iusb) is in the feedback loop, not the battery. the constant-current mode stability is affected by the impedance at the charge current program pin. with no additional capacitance on this pin, the charger is stable with program resistor val- ues as high as 20k (i chg = 50ma); however, additional capacitance on these nodes reduces the maximum allowed program resistor value. checking regulator transient response the regulator loop response can be checked by looking at the load transient response. switching regulators take several cycles to respond to a step in load current. when a load step occurs, v out immediately shifts by an amount equal to ( i load ? esr), where esr is the effective series resistance of c out . i load also begins to charge or dis- charge c out , which generates a feedback error signal. the regulator loop then acts to return v out to its steady state value. during this recovery time v out can be monitored for overshoot or ringing that would indicate a stability problem. for a detailed explanation of switching control loop theory, see application note 76. a second, more severe transient is caused by switching in loads with large (>1f) supply bypass capacitors. the discharged bypass capacitors are effectively put in paral- lel with c out , causing a rapid drop in v out . no regulator can deliver enough current to prevent this problem if the load switch resistance is low and it is driven quickly. the only solution is to limit the rise time of the switch drive so that the load rise time is limited to approximately (25 ? c load ). thus, a 10f capacitor charging to 3.3v would require a 250s rise time, limiting the charging current to about 130ma.
LTC3550 20 3550fa applicatio s i for atio wu u u protecting the usb pin and wall adapter input from overvoltage transients caution must be exercised when using ceramic capacitors to bypass the usbin pin or the wall adapter inputs. high voltage transients can be generated when the usb or wall adapter is hot-plugged. when power is supplied via the usb bus or wall adapter, the cable inductance along with the self resonant and high q characteristics of ceramic capacitors can cause substantial ringing which could exceed the maximum voltage ratings and damage the LTC3550. refer to linear technology application note 88, entitled ceramic input capacitors can cause overvoltage transients for a detailed discussion of this problem. the long cable lengths of most wall adapters and usb cables makes them especially susceptible to this problem. to bypass the usb and the wall adapter inputs, add a 1 resistor in series with a ceramic capacitor to lower the effective q of the network and greatly reduce the ringing. a tantalum, os-con, or electrolytic capacitor can be used in place of the ceramic and resistor, as their higher esr reduces the q, thus reducing the voltage ringing. the oscilloscope photograph in figure 5 shows how seri- ous the overvoltage transient can be for the usb and wall adapter inputs. for both traces, a 5v supply is hot-plugged using a three foot long cable. for the top trace, only a 4.7f ceramic x5r capacitor (without the recommended 1 series resistor) is used to locally bypass the input. this trace shows excessive ringing when the 5v cable is inserted, with the overvoltage spike reaching 10v. for the bottom trace, a 1 resistor is added in series with the 4.7f ceramic capacitor to locally bypass the 5v input. this trace shows the clean response resulting from the addition of the 1 resistor. even with the additional 1 resistor, bad design techniques and poor board layout can often make the overvoltage problem even worse. system designers often add extra inductance in series with input lines in an attempt to mini- mize the noise fed back to those inputs by the application. in reality, adding these extra inductances only makes the overvoltage transients worse. since cable inductance is one of the fundamental causes of the excessive ringing, adding a series ferrite bead or inductor increases the ef- fective cable inductance, making the problem even worse. for this reason, do not add additional inductance (ferrite beads or inductors) in series with the usb or wall adapter inputs. for the most robust solution, 6v transorbs or zener diodes may also be added to further protect the usb and wall adapter inputs. two possible protection devices are the sm2t from stmicroelectronics and the edz series devices from rohm. always use an oscilloscope to check the voltage wave- forms at the usbin and dcin pins during usb and wall adapter hot-plug events to ensure that overvoltage transients have been adequately removed. pc board layout checklist when laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3550. these items are also illustrated graphically in figures 6 and 7. check the following in your layout: figure 5. waveforms resulting from hot-plugging a 5v input supply when using ceramic bypass capacitors figure 6. dc-dc converter layout diagram 4.7 f only 2v/div 4.7 f + 1 2v/div 20 s/div 3550 f04 6 7 8 10 9 3550 f06 + C l1 bold lines indicate high current paths LTC3550 v fb v cc gnd sw gnd v cc c in v out r2 c out c f 17 + C r1
LTC3550 21 3550fa applicatio s i for atio wu u u 1. the power traces, consisting of the gnd trace, the sw trace and the v cc trace should be kept short, direct and wide. 2. does the v fb pin connect directly to the feedback resis- tors? the resistive divider r1/r2 must be connected between the (+) plate of c out and ground. 3. does the (+) plate of c in connect to v cc as closely as possible? this capacitor provides the ac current to the internal power mosfets. 4. keep the switching node, sw, away from the sensitive v fb node. 5. keep the (C) plates of c in and c out as close as possible. 6. solder the exposed pad on the backside of the package to pc board ground for optimum thermal performance. the thermal resistance of the package can be further enhanced by increasing the area of the copper used for pc board ground. design example as a design example, assume the LTC3550 is used in a single lithium-ion battery-powered cellular phone application. the battery is charged by either plugging a wall adapter cable into the phone or putting the phone in a usb cradle. the optimum charge current for this parti- cular lithium-ion battery is determined to be 800ma. the buck regulator output voltage needs to be 1.8v. starting with the charger, choosing r idc to be 1.24k programs the charger for 806ma. choosing r iusb to be 2.1k programs the charger for 475ma when charging from the usb cradle, ensuring that the charger never exceeds the 500ma maximum current supplied by the usb port. a good rule of thumb for i terminate is one- tenth the full charge current, so r iterm is picked to be 1.24k (i terminate = 80ma). moving on to the step-down converter, v cc will be pow- ered from the battery which can range from a maximum of 4.2v down to about 2.7v. the load current requirement figure 7. dc-dc converter suggested layout v cc v fb v out sw run l1 gnd via to v out via to gnd c in r2 3550 f07 via to v cc r1 c f c out
LTC3550 22 3550fa typical applicatio s u full featured dual input charger plus step-down converter figure 8a. design example circuit applicatio s i for atio wu u u is a maximum of 600ma but most of the time it will be in standby mode, requiring only 2ma. ef? ciency at both low and high load currents is important. with this information we can calculate l using equation (1), ?= ? ? ? ? ? ? ? i v fl v v l out o out cc ? ?1 substituting v out = 1.8v, v cc = 4.2v, i l = 240ma and f o = 1.5mhz in equation (3) gives: l v mhz ma v v =? ? ? ? ? ? ? = 18 1 5 240 1 18 42 286 . .?( ) ? . . .h h a 2.2h inductor works well for this application. for best ef? ciency choose a 720ma or greater inductor with less than 0.2 series resistance. c in will require an rms cur- rent rating of at least 0.3a = i load(max) /2 at temperature and c out will require an esr of less than 0.25 . in most cases, a ceramic capacitor will satisfy this requirement. for the feedback resistors, choose r1 = 301k. r2 can then be calculated from equation (4) to be: rr v k out 21 06 1 604 = ? ? ? ? ? ? = . C figure 8 shows the complete circuit along with its ef- ? ciency curve. 1.24k 1% 2.1k 1% wall adapter usb port 1 f 1 f 3550 f08a 4.7 f ? LTC3550 run dcin en sw v fb bat gnd 10 f** cer iterm + 2.2 h* 4.2v single-cell li-ion battery v out 1.8v 600ma 1.24k 1% 800ma (wall) 475ma (usb) usbin iusb idc v cc 22pf 604k 301k murata lqh32cn2r2m33 taiyo yuden jmk316bj106ml taiyo yuden lmk212bj475mg * ** ? figure 8b. buck regulator ef? ciency vs output current 1k 1% 1.24k 1% wall adapter usb power 3550 ta03 LTC3550 idc iterm iusb en usbin dcin v fb sw gnd pwr chrg run bat 2.2 h 22 f 604k 301k 4.2v single-cell li-ion battery v out 1.8v 600ma 2.1k 1% 1 f 1 f 10 f cer v cc + 4.7 f 1k 1k 800ma (wall) 475ma (usb) output current (ma) 70 efficiency (%) 80 90 95 0.1 10 100 1000 3550 g24 60 1 85 75 65 v out = 1.8v v cc = 2.7v v cc = 4.2v v cc = 3.6v
LTC3550 23 3550fa information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. dhc package 16-lead plastic dfn (5mm 3mm) (reference ltc dwg # 05-08-1706) package descriptio u 3.00 0.10 (2 sides) 5.00 0.10 (2 sides) note: 1. drawing proposed to be made variation of version (wjed-1) in jedec package outline mo-229 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom viewexposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.115 typ r = 0.20 typ 4.40 0.10 (2 sides) 1 8 16 9 pin 1 top mark (see note 6) 0.200 ref 0.00 C 0.05 (dhc16) dfn 1103 0.25 0.05 pin 1 notch 0.50 bsc 4.40 0.05 (2 sides) recommended solder pad pitch and dimensions 1.65 0.05 (2 sides) 2.20 0.05 0.50 bsc 0.65 0.05 3.50 0.05 package outline 0.25 0.05
LTC3550 24 3550fa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2006 lt 0406 rev a ? printed in usa dual input charger plus step-down converter with wall adapter powerpath ? part number description comments ltc3406/ltc3406b 1.5mhz, 600ma synchronous step-down dc/dc converter in thinsot tm v in : 2.5v to 5.5v, v out(min ) = 0.6v, i q = 20a, thinsot package ltc3455 dual dc/dc converter with usb power management and li-ion battery charger ef? ciency >96%, accurate usb current limiting (500ma/100ma), 4mm 4mm qfn-24 package ltc3456 2-cell multi-output dc/dc converter with usb power manager seamless transition between 2-cell battery, usb and ac wall adapter input power sources, qfn package LTC3550-1 dual input usb/ac adapter li-ion battery charger with 600ma buck converter synchronous buck converter, ef? ciency = 93%, output = 1.875v at 600ma, charge current = 950ma programmable 5mm 3mm 16-lead dfn package ltc3552-1 standalone linear li-ion battery charger with dual synchronous buck converter synchronous buck converter, ef? ciency > 90%, outputs = 1.8v at 800ma, 1.575v at 400ma, charge current programmable up to 950ma, usb compatible, 5mm 3mm 16-lead dfn package ltc4055 usb power controller and battery charger charges single-cell li-ion batteries directly from usb port, thermal regulation, 4mm 4mm qfn-16 package ltc4058 standalone 950ma lithium-ion charger in dfn c/10 charge termination, battery kelvin sensing, 7% charge accuracy ltc4063 standalone li-ion charger plus ldo 4.2v, 0.35% float voltage, up to 1a charge current, 100ma ldo ltc4068 standalone linear li-ion battery charger with programmable termination charge current up to 950ma, thermal regulation, 3mm 3mm dfn-8 package ltc4075 dual input standalone li-ion battery charger charges single-cell li-ion batteries from wall adapter and usb inputs with automatic input power detection and selection, 950ma charger current, thermal regulation, c/x charge termination, 3mm 3mm dfn package ltc4076 dual input standalone li-ion battery charger charges single-cell li-ion batteries from wall adapter and usb inputs with automatic input power detection and selection, 950ma charger current, thermal regulation, usb low power mode select, c/x charge termination, 3mm 3mm dfn package ltc4077 dual input standalone li-ion battery charger charges single-cell li-ion batteries from wall adapter and usb inputs with automatic input power detection and selection, 950ma charger current, thermal regulation, programmable usb low power mode, c/10 charge termination, 3mm 3mm dfn package thinsot is a trademark of linear technology corporation. related parts 1k 1% 1.24k 1% usb power 3550 ta04 LTC3550 idc iterm iusb usbin en v fb sw gnd v cc dcin run 2.2 h 4.2v single-cell li-ion battery v out 1.8v 600ma 2.1k 1% 1 f 10 f cer bat + 4.7 f 1 f wall adapter 1k 800ma (wall) 475ma (usb) 22pf 604k 301k powerpath is a trademark of linear technology corporation u typical applicatio

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